Red Hat ENTERPRISE LINUX 4 - DEVELOPER TOOLS GUIDE Informations techniques Page 1

White Paper Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE Version 1.5

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 10 3. Verify that the card is working by running a sample program (located i

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 11 3. Update the flash on your card(s) as detailed in section 7.2 of readme.txt 4. Rebo

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 12 sudo micctrl -w sudo /opt/intel/mic/bin/micinfo If the Intel® MPSS service is

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 13 coprocessor were installed, it would be called “mic1” and located at 172.31.2.1, and i

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 14 Development Environment: Available Compilers and Libraries  Compilers o Intel C++ C

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 15 o Intel TBB: /opt/intel/composerxe/tbb/bin/tbbvars.csh or tbbvars.sh with intel64 as

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 16 • Some sample offload code using the explicit memory copy model can be found in: o C

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 17 For csh – setenv H_TRACE 2 For sh – export H_TRACE=2  To print the compiler’s intern

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 18 Host Version: The following sample code shows the C code to implement this version of

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 19 Vector Reduction with Offload Each core on the Intel® Xeon Phi™ Coprocessor has a VPU

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 2 Contents Introduction ...

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 20 APIs for Dynamic Aligned Shared memory allocation void *_Offload_shared_aligned_malloc

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 21 Code Example 4: Using the “_Cilk_shared” and “_Cilk_offload” Keywords with Dynamic All

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 22 ulimit –s unlimited 7. Go to /tmp and run a.out: cd /tmp ./a.out Parallel Programm

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 23 } } return ret; } Code Example 5: C/C++: Using OpenMP in Offloaded Re

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 24 } return ret; } Code Example 7: Array Reduction Using Open MP and Intel® Cilk™

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 25 Code Example 10: Wrapping the Intel TBB Header Files in C/C++ Functions called from

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 26 Code Example 12: Prefixing an Intel TBB Function for Intel® MIC Architecture code gene

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 27 Step 2: Send the data over to the Intel® Xeon Phi™ Coprocessor using #pragma offl

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 28 out(C:length(matrix_elements) alloc_if(0) free_if(0)) // output data {

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 29 About the Authors Sudha Udanapalli Thiagarajan received a Bachelor’s degree in Comput

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 3 Asynchronous Offload and Data Transfer ...

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 30 Notices INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 31 Performance Notice For more complete information about performance and benchmark resul

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 4 Introduction This document will help you get started writing code and running applicati

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 5 NAcc – Native Acceleration – a mode or form of Intel® MKL in which the data being proce

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 6  Device Driver: At the bottom of the software stack in kernel space is the Intel® Xe

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 7 Intel® Many Integrated Core Architecture Overview The Intel® Xeon Phi™ Coprocessor

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 8 Administrative Tasks If you purchased the Intel® Xeon Phi™ Coprocessor from an equipmen

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE 9  Make sure that the Driver Version, MPSS Version and Flash Version are verified accor